-- GSI GS8162Z72 JTAG BSDL -- BSDL File Generated: November 1st, 2000 -- -- Revision History: --Rev D -- B) added NCs to remove warning messages -- C) Changed IR Capture from 001 to XXX -- D) Removed DP and QE pins entity GS8162Z72 is generic (PHYSICAL_PIN_MAP : string := "BGA_PACKAGE"); port ( ADDR: in bit_vector(0 to 17); DQa: inout bit_vector(1 to 9); DQb: inout bit_vector(1 to 9); DQc: inout bit_vector(1 to 9); DQd: inout bit_vector(1 to 9); DQe: inout bit_vector(1 to 9); DQf: inout bit_vector(1 to 9); DQg: inout bit_vector(1 to 9); DQh: inout bit_vector(1 to 9); Ba: in bit; Bb: in bit; Bc: in bit; Bd: in bit; Be: in bit; Bf: in bit; Bg: in bit; Bh: in bit; CK: in bit; W: in bit; E1: in bit; E2: in bit; E3: in bit; G: in bit; ADV: in bit; ZZ: in bit; FT: in bit; LBO: in bit; PE: in bit; ZQ: in bit; TMS: in bit; TDI: in bit; TDO: out bit; TCK: in bit; VDD: linkage bit_vector(0 to 13); VSS: linkage bit_vector(0 to 29); VDDQ: linkage bit_vector(0 to 23); NC: linkage bit_vector(0 to 20); MC: linkage bit_vector(0 to 5) ); use STD_1149_1_1990.all; attribute PIN_MAP of GS8162Z72 : entity is PHYSICAL_PIN_MAP; constant BGA_PACKAGE : PIN_MAP_STRING := "ADDR: (W6,V6,W7,W5,V9,V8,V7,V5,V4,V3,U8,U6,U4, " & "A3,A5,A7,B7,A9), " & "DQa: (L11,M11,N11,P11,L10,M10,N10,P10,R10), " & "DQb: (A10,B10,C10,D10,A11,B11,C11,D11,E11), " & "DQc: (J1,H1,G1,F1,J2,H2,G2,F2,E2), " & "DQd: (W2,V2,U2,T2,W1,V1,U1,T1,R1), " & "DQe: (W10,V10,U10,T10,W11,V11,U11,T11,R11), " & "DQf: (J11,H11,G11,F11,J10,H10,G10,F10,E10), " & "DQg: (A2,B2,C2,D2,A1,B1,C1,D1,E1), " & "DQh: (L1,M1,N1,P1,L2,M2,N2,P2,R2), " & "Ba: C9, " & "Bb: B8, " & "Bc: B3, " & "Bd: C4, " & "Be: C8, " & "Bf: B9, " & "Bg: B4, " & "Bh: C3, " & "CK: K3, " & "W: B6, " & "E1: C6, " & "E2: A4, " & "E3: A8," & "G: D6, " & "ADV: A6, " & "ZZ: P6, " & "FT: L6, " & "LBO: T6, " & "PE: T7, " & "ZQ: F6, " & "TMS: W3, " & "TDI: W4, " & "TDO: W8, " & "TCK: W9, " & "VDD: (E5,E6,E7,G5,G7,J5,J7,L5,L7,N5,N7,R5,R6,R7), " & "VSS: (D3,D9,F3,F4,F5,F7,F8,F9,H3,H4,H5,H7, " & "H8,H9,K5,K7,M3,M4,M5,M7,M8,M9,P3, " & "P4,P5,P7,P8,P9,T3,T9), " & "VDDQ:(E3,E4,E8,E9,G3,G4,G8,G9,J3,J4,J8,J9, " & "L3,L4,L8,L9,N3,N4,N8,N9,R3,R4,R8,R9)," & "NC: (K1,K2,U3,D4,K4,T4,B5,C5,D5,T5,U5,C7,D7,U7,D8,K8,T8,U9,K9,K10, K11)," & "MC: (G6,H6,J6,K6,M6,N6)"; attribute TAP_SCAN_IN of TDI : signal is true; attribute TAP_SCAN_OUT of TDO : signal is true; attribute TAP_SCAN_MODE of TMS : signal is true; attribute TAP_SCAN_CLOCK of TCK : signal is (10.0e6, BOTH); attribute INSTRUCTION_LENGTH of GS8162Z72 : entity is 3; attribute INSTRUCTION_OPCODE of GS8162Z72 : entity is "EXTEST (000)," & "SAMPLE (100)," & "IDCODE (001)," & "SAMPLZ (010)," & "BYPASS (111)"; attribute INSTRUCTION_CAPTURE of GS8162Z72 : entity is "XXX"; attribute IDCODE_REGISTER of GS8162Z72 : entity is "0000" & -- Die Revision Code "000000000000" & -- Not Used "1001" & -- I/O Configuration X72 "00011011001" & -- GSI JEDEC Vendor ID Code "1"; -- Presence Register (1149.1 requirement) attribute REGISTER_ACCESS of GS8162Z72 : entity is "BOUNDARY (EXTEST,SAMPLE,SAMPLZ),"& "IDCODE (IDCODE),"& "BYPASS (BYPASS)"; attribute BOUNDARY_CELLS of GS8162Z72 : entity is "BC_1,BC_4"; attribute BOUNDARY_LENGTH of GS8162Z72 : entity is 194; attribute BOUNDARY_REGISTER of GS8162Z72 : entity is -- num cell port func safe [ccell disval rslt] "0 (BC_1, PE, input, X)," & "1 (BC_4, * ,internal, X)," & "2 (BC_4, * ,internal, X)," & "3 (BC_1, ADDR(3), input, X)," & "4 (BC_1, ADDR(11), input, X)," & "5 (BC_1, ADDR(6), input, X)," & "6 (BC_1, ADDR(2), input, X)," & "7 (BC_1, ADDR(10), input, X)," & "8 (BC_1, ADDR(5), input, X)," & "9 (BC_1, ADDR(4), input, X)," & --Boundary Scan for I/O pin "10 (BC_1, DQe(9), output3, X, 193, 0, Z)," & "11 (BC_1, DQe(9), input, X)," & "12 (BC_1, DQa(9), output3, X, 193, 0, Z)," & "13 (BC_1, DQa(9), input, X)," & "14 (BC_1, DQe(5), output3, X, 193, 0, Z)," & "15 (BC_1, DQe(5), input, X)," & "16 (BC_1, DQa(4), output3, X, 193, 0, Z)," & "17 (BC_1, DQa(4), input, X)," & "18 (BC_1, DQe(1), output3, X, 193, 0, Z)," & "19 (BC_1, DQe(1), input, X)," & "20 (BC_1, DQa(8), output3, X, 193, 0, Z)," & "21 (BC_1, DQa(8), input, X)," & "22 (BC_1, DQe(4), output3, X, 193, 0, Z)," & "23 (BC_1, DQe(4), input, X)," & "24 (BC_1, DQa(7), output3, X, 193, 0, Z)," & "25 (BC_1, DQa(7), input, X)," & "26 (BC_1, DQe(8), output3, X, 193, 0, Z)," & "27 (BC_1, DQe(8), input, X)," & "28 (BC_1, DQa(3), output3, X, 193, 0, Z)," & "29 (BC_1, DQa(3), input, X)," & "30 (BC_1, DQe(3), output3, X, 193, 0, Z)," & "31 (BC_1, DQe(3), input, X)," & "32 (BC_1, DQa(6), output3, X, 193, 0, Z)," & "33 (BC_1, DQa(6), input, X)," & "34 (BC_1, DQe(7), output3, X, 193, 0, Z)," & "35 (BC_1, DQe(7), input, X)," & "36 (BC_1, DQa(2), output3, X, 193, 0, Z)," & "37 (BC_1, DQa(2), input, X)," & "38 (BC_1, DQe(6), output3, X, 193, 0, Z)," & "39 (BC_1, DQe(6), input, X)," & "40 (BC_1, DQa(1), output3, X, 193, 0, Z)," & "41 (BC_1, DQa(1), input, X)," & "42 (BC_1, DQe(2), output3, X, 193, 0, Z)," & "43 (BC_1, DQe(2), input, X)," & "44 (BC_1, DQa(5), output3, X, 193, 0, Z)," & "45 (BC_1, DQa(5), input, X)," & "46 (BC_1, ZZ , input, X)," & "47 (BC_4, * ,internal, X)," & "48 (BC_4, * ,internal, X)," & --Boundary Scan for I/O pin "49 (BC_1, DQb(1), output3, X, 193, 0, Z)," & "50 (BC_1, DQb(1), input, X)," & "51 (BC_1, DQf(1), output3, X, 193, 0, Z)," & "52 (BC_1, DQf(1), input, X)," & "53 (BC_1, DQb(5), output3, X, 193, 0, Z)," & "54 (BC_1, DQb(5), input, X)," & "55 (BC_1, DQf(5), output3, X, 193, 0, Z)," & "56 (BC_1, DQf(5), input, X)," & "57 (BC_1, DQb(2), output3, X, 193, 0, Z)," & "58 (BC_1, DQb(2), input, X)," & "59 (BC_1, DQf(2), output3, X, 193, 0, Z)," & "60 (BC_1, DQf(2), input, X)," & "61 (BC_1, DQb(3), output3, X, 193, 0, Z)," & "62 (BC_1, DQb(3), input, X)," & "63 (BC_1, DQf(6), output3, X, 193, 0, Z)," & "64 (BC_1, DQf(6), input, X)," & "65 (BC_1, DQb(6), output3, X, 193, 0, Z)," & "66 (BC_1, DQb(6), input, X)," & "67 (BC_1, DQf(7), output3, X, 193, 0, Z)," & "68 (BC_1, DQf(7), input, X)," & "69 (BC_1, DQb(4), output3, X, 193, 0, Z)," & "70 (BC_1, DQb(4), input, X)," & "71 (BC_1, DQf(3), output3, X, 193, 0, Z)," & "72 (BC_1, DQf(3), input, X)," & "73 (BC_1, DQb(7), output3, X, 193, 0, Z)," & "74 (BC_1, DQb(7), input, X)," & "75 (BC_1, DQf(8), output3, X, 193, 0, Z)," & "76 (BC_1, DQf(8), input, X)," & "77 (BC_1, DQb(8), output3, X, 193, 0, Z)," & "78 (BC_1, DQb(8), input, X)," & "79 (BC_1, DQf(4), output3, X, 193, 0, Z)," & "80 (BC_1, DQf(4), input, X)," & "81 (BC_1, DQb(9), output3, X, 193, 0, Z)," & "82 (BC_1, DQb(9), input, X)," & "83 (BC_1, DQf(9), output3, X, 193, 0, Z)," & "84 (BC_1, DQf(9), input, X)," & "85 (BC_4, * ,internal, X)," & "86 (BC_4, * ,internal, X)," & "87 (BC_1, ADDR(17), input, X)," & "88 (BC_1, ADDR(15), input, X)," & "89 (BC_1, ADDR(14), input, X)," & "90 (BC_1, ADV, input, X)," & "91 (BC_1, G, input, X)," & "92 (BC_4, * ,internal, X)," & "93 (BC_1, W, input, X)," & "94 (BC_1, Bh, input, X)," & "95 (BC_1, Bc, input, X)," & "96 (BC_1, Bf, input, X)," & "97 (BC_1, Ba, input, X)," & "98 (BC_1, CK, input, X)," & "99 (BC_4, *, internal, X)," & "100 (BC_4, *, internal, X)," & "101 (BC_1, E3, input, X)," & "102 (BC_1, Be, input, X)," & "103 (BC_1, Bb, input, X)," & "104 (BC_1, Bg, input, X)," & "105 (BC_1, Bd, input, X)," & "106 (BC_1, E2, input, X)," & "107 (BC_1, E1, input, X)," & "108 (BC_1, ADDR(16), input, X)," & "109 (BC_1, ADDR(13), input, X)," & "110 (BC_1, DQg(9), output3, X, 193, 0, Z)," & "111 (BC_1, DQg(9), input, X)," & "112 (BC_1, DQc(9), output3, X, 193, 0, Z)," & "113 (BC_1, DQc(9), input, X)," & "114 (BC_1, DQg(4), output3, X, 193, 0, Z)," & "115 (BC_1, DQg(4), input, X)," & "116 (BC_1, DQc(8), output3, X, 193, 0, Z)," & "117 (BC_1, DQc(8), input, X)," & "118 (BC_1, DQg(8), output3, X, 193, 0, Z)," & "119 (BC_1, DQg(8), input, X)," & "120 (BC_1, DQc(4), output3, X, 193, 0, Z)," & "121 (BC_1, DQc(4), input, X)," & "122 (BC_1, DQg(7), output3, X, 193, 0, Z)," & "123 (BC_1, DQg(7), input, X)," & "124 (BC_1, DQc(7), output3, X, 193, 0, Z)," & "125 (BC_1, DQc(7), input, X)," & "126 (BC_1, DQg(3), output3, X, 193, 0, Z)," & "127 (BC_1, DQg(3), input, X)," & "128 (BC_1, DQc(3), output3, X, 193, 0, Z)," & "129 (BC_1, DQc(3), input, X)," & "130 (BC_1, DQg(6), output3, X, 193, 0, Z)," & "131 (BC_1, DQg(6), input, X)," & "132 (BC_1, DQc(6), output3, X, 193, 0, Z)," & "133 (BC_1, DQc(6), input, X)," & "134 (BC_1, DQg(5), output3, X, 193, 0, Z)," & "135 (BC_1, DQg(5), input, X)," & "136 (BC_1, DQc(2), output3, X, 193, 0, Z)," & "137 (BC_1, DQc(2), input, X)," & "138 (BC_1, DQg(2), output3, X, 193, 0, Z)," & "139 (BC_1, DQg(2), input, X)," & "140 (BC_1, DQc(1), output3, X, 193, 0, Z)," & "141 (BC_1, DQc(1), input, X)," & "142 (BC_1, DQg(1), output3, X, 193, 0, Z)," & "143 (BC_1, DQg(1), input, X)," & "144 (BC_1, DQc(5), output3, X, 193, 0, Z)," & "145 (BC_1, DQc(5), input, X)," & "146 (BC_1, FT, input, X)," & "147 (BC_4, * ,internal, X)," & "148 (BC_4, *, internal, X)," & "149 (BC_1, DQd(2), output3, X, 193, 0, Z)," & "150 (BC_1, DQd(2), input, X)," & "151 (BC_1, DQh(1), output3, X, 193, 0, Z)," & "152 (BC_1, DQh(1), input, X)," & "153 (BC_1, DQd(1), output3, X, 193, 0, Z)," & "154 (BC_1, DQd(1), input, X)," & "155 (BC_1, DQh(5), output3, X, 193, 0, Z)," & "156 (BC_1, DQh(5), input, X)," & "157 (BC_1, DQd(5), output3, X, 193, 0, Z)," & "158 (BC_1, DQd(5), input, X)," & "159 (BC_1, DQh(2), output3, X, 193, 0, Z)," & "160 (BC_1, DQh(2), input, X)," & "161 (BC_1, DQd(6), output3, X, 193, 0, Z)," & "162 (BC_1, DQd(6), input, X)," & "163 (BC_1, DQh(6), output3, X, 193, 0, Z)," & "164 (BC_1, DQh(6), input, X)," & "165 (BC_1, DQd(7), output3, X, 193, 0, Z)," & "166 (BC_1, DQd(7), input, X)," & "167 (BC_1, DQh(4), output3, X, 193, 0, Z)," & "168 (BC_1, DQh(4), input, X)," & "169 (BC_1, DQd(3), output3, X, 193, 0, Z)," & "170 (BC_1, DQd(3), input, X)," & "171 (BC_1, DQh(7), output3, X, 193, 0, Z)," & "172 (BC_1, DQh(7), input, X)," & "173 (BC_1, DQd(4), output3, X, 193, 0, Z)," & "174 (BC_1, DQd(4), input, X)," & "175 (BC_1, DQh(3), output3, X, 193, 0, Z)," & "176 (BC_1, DQh(3), input, X)," & "177 (BC_1, DQd(8), output3, X, 193, 0, Z)," & "178 (BC_1, DQd(8), input, X)," & "179 (BC_1, DQh(8), output3, X, 193, 0, Z)," & "180 (BC_1, DQh(8), input, X)," & "181 (BC_1, DQd(9), output3, X, 193, 0, Z)," & "182 (BC_1, DQd(9), input, X)," & "183 (BC_1, DQh(9), output3, X, 193, 0, Z)," & "184 (BC_1, DQh(9), input, X)," & "185 (BC_1, LBO, input, X)," & "186 (BC_1, ADDR(9), input, X)," & "187 (BC_1, ADDR(12), input, X)," & "188 (BC_1, ADDR(8), input, X)," & "189 (BC_1, ADDR(7), input, X)," & "190 (BC_1, ADDR(1), input, X)," & "191 (BC_1, ADDR(0), input, X)," & "192 (BC_1, ZQ, input, X)," & "193 (BC_1, *, control, 0)" ; end GS8162Z72;